1. Field of the Invention
The present invention relates generally to the field of integrated circuit fabrication, and more specifically to a fabrication process for use in creating transistor structures in a semiconductor substrate.
2. Description of the Related Art
Currently, transistors, such as metal-oxide semiconductor field-effect transistors (MOSFET) are formed over a semiconductor substrate and are used in many integrated circuit devices. The MOSFET transistor utilizes a gate electrode to control an underlying surface channel joining a source and drain region. The substrate is doped oppositely to the source and drain regions. For example, the source and drain are of the same conductivity, e.g., N-type conductivity, whereas the channel has the conductivity of the semiconductor substrate, e.g., P-type conductivity. Typically, the gate electrode is separated from the semiconductor substrate by a thin insulating layer such as a gate oxide. The channel, source, and drain are located within the semiconductor substrate.
In a typical process forming the gate electrode of a MOSFET transistor, successive blanket depositions of various layers occur. First, an insulating layer for use as a gate oxide is formed on the surface of a semiconductor substrate. Second, a conductive layer such as polysilicon is formed on top of the insulating layer. Third, a thin refractory metal layer is often deposited, such as tungsten, on top of the conductive layer which is used to form a silicide with the underlying polysilicon. An insulating layer may also be applied over the tungsten layer. This stack of layers is etched to define what ultimately becomes the gate stack for the transistor.
However, the presence of a refractory metal layer such as tungsten, can create problems during a gate stack etching process. Tungsten is a grainy and coarse metal. Accordingly, the etch front as it passes through the tungsten layer, becomes grainy and uneven resulting in a non-uniform etch which can cause undesired effects. For instance, the uneven etch front can result in undesired overetching into portions of the substrate surface. In addition, tungsten particles in the etch mixture can coat the sidewalls of the gate stack producing undesired shorts. The non-uniform etch front can also result in the polysilicon and oxide layers in the gate stack to be undesirably partially etched. If for example, the polysilicon layer is partially etched, it no longer properly functions as an effective self-aligned implant mask during source and drain implantation.